TSMC has unveiled a revolutionary wafer-level chip packaging technology that will enable the creation of monster AI systems up to 120 x 120 mm in size with unprecedented performance and power consumption in kilowatts.
Gigachips for AI
Whole-systems approach
TSMC has developed a pioneering end-to-end chip assembly solution across the entire area of a 300 mm silicon wafer. Breakthrough chip-on-wafer-on-substrate (CoWoS) technology will enable the integration of a huge number of processor cores, ultra-fast memory and various components into a single high-performance system. This unique monolithic design will provide enormous computing power comparable to an entire server rack, in a compact size and the highest energy efficiency.
Advanced technologies
TSMC's revolutionary architecture is based on proprietary System-on-Integrated technology -Chips (SoIC) and Integrated Fan-Out (InFO_SoW). SoIC allows the creation of highly integrated systems by 3D stacking of chips, and InFO_SoW enables the production of ultra-large chips. In turn, Chip-on-Wafer (CoW) technology is designed to consolidate high-density memory like HBM4 and other peripherals into a single component. The synergy of these latest techniques will enable unprecedented scaling of computing systems.
Unlimited capacity
Thanks to the ingenious combination of TSMC's advanced developments, the new gigachips will occupy an area of 120 by 120 mm, which is comparable to a full-size silicon wafer. At the same time, they will be able to include more than 12 segments of the latest generation of ultra-fast memory HBM4e with incredible total bandwidth. The unlimited scale of such monolithic designs will give computing systems monstrous performance previously unattainable by traditional discrete design solutions.
Glossary
- TSMC (Taiwan Semiconductor Manufacturing Company) - the largest contract manufacturer of semiconductor products and one of the leaders in the development of advanced technologies in this area.
- CoWoS (Chip-on-Wafer-on-Substrate) is a revolutionary TSMC chip packaging technology that allows the creation of giant computing systems by combining multiple components on a single silicon substrate.
- HBM (High Bandwidth Memory) is a type of energy-efficient, high-density memory with incredible bandwidth, optimized for use in computing systems.
- SoIC (System on Integrated Chips) is a TSMC technology that makes it possible to assemble complex electronic systems by three-dimensional vertical stacking of various crystals.
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Answers to questions
What is TSMC's Chip-on-Wafer-on-Substrate (CoWoS) packaging technology?
How CoWoS, System-on-Integrated-Chips (SoIC) and System-on-Wafer (SoW) technologies contribute to development of artificial intelligence?
What are the benefits of a platform using TSMC's InFO_SoW, SoIC and CoW technologies?
What are the key features and advantages of CoWoS-based systems compared to traditional solutions?
When is CoWoS technology expected to be introduced into production and what prospects does it open up?
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Discussion of the topic – TSMC's 120 x 120mm chips: the CoWoS chip revolution
TSMC has unveiled new CoWoS technology that will enable the creation of giant 120 x 120 mm chips for high-performance systems and supercomputers of the future.
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Сергей
TSMC's revolutionary technology is truly impressive🤯 Wafer-sized chips are space-scale computing power! I can imagine what problems can be solved using such monsters 💪
Андреас
Wow, TSMC never ceases to amaze! 😲 The guys took a big risk with their developments, and it looks like the risk is justified. I’m already thinking about how to frolic with such chips to train my neural networks 🤓
Франсуа
This is just crazy!🤯 Huge chips - and kilowatts of energy for power. I can’t even imagine how much space data centers on such hardware will take up😳 But the opportunities they open up are worth it, in my opinion.
Марко
Wow, impressive technology! 👏 Integrating high-capacity memory directly into the chip is a powerful leap forward. But what really attracts me is the promise of increased energy efficiency. The guys seem to have seriously thought through the thermoregulation system and energy transfer inside 💡
Иван
Ha, I'm delighted with the concept itself! 😆 A wafer-sized chip is just a dream for any engineer. When will we be able to run our simulations on such a monster? 🤩 If they solve the problem with energy consumption, then it will actually be a bomb!
Януш
It is commendable that TSMC strives for maximum integration and combination of various components. But I’m afraid that such giant chips will become very expensive to produce 😕 And they will probably require a considerable staff of specialists to service them. I'd like to see cost estimates.
Кшиштоф
But now everyone will understand what a “powerful processor” means! 😂 I can imagine this monster the size of a one-year-old child! Or even more 🤣 Just the thought of the heat generation and energy consumption of such systems makes it creepy 😨
Грегор
A pointless waste of resources 😒 Why build such a garden when you can simply use existing technologies more efficiently? These kilowatts of energy would be better spent on more reasonable purposes. Again a fashionable invention for hype, nothing more 🙄